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PCI-SIG Releases Draft 0.5 of PCIe 8.0 Specification

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PCIe 8.0 Specification Draft Released, Targeting 256 GT/s

The PCI Special Interest Group (PCI-SIG) has released draft 0.5 of the PCI Express (PCIe) 8.0 specification, targeting a raw bit rate of 256 GT/s and up to 1 TB/s bi-directionally across a 16-lane configuration. The final specification is expected to be completed by 2028.

Key Details

  • PCIe 8.0 doubles the bandwidth of PCIe 7.0.
  • The standard maintains PAM4 signaling and Flit-based encoding, introduced in PCIe 6.0.
  • Hardware availability is expected after the specification finalization.

PCIe 8.0 targets a raw bit rate of 256 GT/s and up to 1 TB/s bi-directionally across a 16-lane configuration.

Background

  • PCIe 6.0 final specification was released in 2022.
  • PCIe 7.0 is expected to reach 128 GT/s with hardware anticipated by 2027.
  • The first PCIe 6.0 SSD entered mass production in 2025, four years after the standard was finalized.

Statements

PCI-SIG states that PCIe 8.0 is designed for data-intensive markets including AI, datacenter infrastructure, high-speed networking, edge computing, and quantum computing.

"PCIe 8.0 is designed for data-intensive markets including AI, datacenter infrastructure, high-speed networking, edge computing, and quantum computing." — PCI-SIG

The adoption rate in consumer applications may be limited, as a single PCIe 4.0 x1 lane is sufficient for 10 GbE networking, and many consumer GPUs use four or eight lanes.

Hardware availability is expected after the specification finalization in 2028.